Flash EEPROMS (lash-Electronically Erasable Programmable Read-Only-Memory) are frequently used semiconductor memories. These memory units have the characteristic of being erasable and directly rewritable by means of simple control signals. In their starting condition the bits of said flash EEPROMs are in a defined condition, the number one e.g. in this case. For programming, these bits are set from one to zero, or to one if the defined condition is zero. A respective programming action takes place in a way so that the individual bits are checked and a bit is set from one to zero for programming. This setting is accomplished by a change in potential, which is initiated by a processing unit through a programming sequence, thus a sequence of programming steps. It is directly or indirectly connected to the flash EEPROM. Algorithms which monitor the programming operate inside the flash EEPROM.
Such programming becomes especially time-critical when the age of the unit being used increases, and the frequency of use increases accordingly. This means that the flash EEPROM has been programmed and then erased again n-times. It was proven that in "older" units such programming times can be between 8.mu. and 1 ms. If algorithms which operate inside the flash EEPROM monitor such programming as explained earlier, no further task can be carried out by the processing unit during the programming time and while so-called data polling algorithms are in use.
Such data polling algorithms in conjunction with the corresponding memory units are known from the following publication: AMD flash memory products, Data Book/Handbook 1994/95. It explains that said data polling is a method which indicates to the processing unit, hereafter called CPU, if a programming is still in operation or if it has already ended. However, no further program such as the main program can be carried out by the CPU while said data polling algorithms are being used.
A further state-of-the-art technique of the Intel Company describes "byte write flash block erase polling algorithms". It describes a hardware method for determining whether the writing of a byte or the erasing of a block has been completed. In this case as well, the CPU cannot carry out any further programs during this writing procedure (from Intel Flash Memory, Volume 1, 1994).
As stated earlier, the CPU is occupied by both of these previously introduced algorithms during the writing. Since longer time periods result when a flash EEPROM is programmed by an older unit, and such time periods are used to program this memory, it can lead to very long occupation times of the CPU during which it is not available to carry out programs.